; ; $Revision: 1.2 $ ; $Date: 11 Oct 1989 16:15:04 $ ; ; *************************************************************************** ; * Copyright (C) 1988 by Phoenix Technologies Ltd. This program * ; * contains proprietary and confidential information. All rights reserved * ; * except as may be permitted by prior written consent. * ; *************************************************************************** ; SYS0011.ADF ; This file contains the Hardware test features for the C&T250 chipset. AdapterId 0011h AdapterName " C&T Internal Features " NumBytes 0 NamedItem Cmos 42h ChipReg 8Eh Prompt "CPU speed" Choice "16 MHz 8Eh - 1XXXXX10" pos[0]=1XXXXX10b Choice "12.5 MHz 8Eh - 1XXXXX01" pos[0]=1XXXXX01b Choice "10 MHz 8Eh - 1XXXXX00" pos[0]=1XXXXX00b Choice "20 MHz 8Eh - 1XXXXX11" pos[0]=1XXXXX11b Help "Affects the 82C221 MCA/CPU controller. The speed selected MUST match the speed of the crystal installed on the system board. Unpredictable errors occur if the speeds are mismatched." NamedItem Cmos 42h ChipReg 8Eh Prompt "On board peripheral wait states" Choice "4 8Eh - 1XXX11XX" pos[0]=1XXX11XXb Choice "3 8Eh - 1XXX10XX" pos[0]=1XXX10XXb Choice "2 8Eh - 1XXX01XX" pos[0]=1XXX01XXb Choice "1 8Eh - 1XXX00XX" pos[0]=1XXX00XXb Help "Affects the 82C221 MCA/CPU controller." NamedItem Cmos 42h ChipReg 8Eh Prompt "External I/O wait states" Choice "1 8Eh - 1X01XXXX" pos[0]=1X01XXXXb Choice "2 8Eh - 1X10XXXX" pos[0]=1X10XXXXb Choice "3 8Eh - 1X11XXXX" pos[0]=1X11XXXXb Choice "0 8Eh - 1X00XXXX" pos[0]=1X00XXXXb Help "Specify the number of external I/O wait states." NamedItem Cmos 42h ChipReg 8Eh Prompt "External memory wait states" Choice "1 8Eh - 11XXXXXX" pos[0]=11XXXXXXb Choice "0 8Eh - 10XXXXXX" pos[0]=10XxXXXXb Help "Specify the number of external memory wait states." NamedItem Cmos 43h ChipReg 8Fh Prompt "Matched memory cycle" Choice "Disable 8Fh - 001XXXX0" pos[0]=001XXXX0b Choice "Enable 8Fh - 001XXXX1" pos[0]=001XXXX1b Help "Specify 'Enable' if you wish to have matched memory cycles." NamedItem Cmos 43h ChipReg 8Fh Prompt "Fast VGA cycle requests" Choice "Disable 8Fh - 001XXX0X" pos[0]=001XXX0Xb Choice "Enable 8Fh - 001XXX1X" pos[0]=001XXX1Xb Help "Specify 'Enable' if you wish to have Fast VGA cycle requests." NamedItem Cmos 43h ChipReg 8Fh Prompt "Channel READY extension" Choice "Enable 8Fh - 001XX1XX" pos[0]=001XX1XXb Choice "Disable 8Fh - 001XX0XX" pos[0]=001XX0XXb Help "Specify 'Enable' if you wish to have Channel READY extension." NamedItem Cmos 43h ChipReg 8Fh Prompt "Fast Cycle Write Data Hold" Choice "Enable 8Fh - 001X1XXX" pos[0]=001X1XXXb Choice "Disable 8Fh - 001X0XXX" pos[0]=001X0XXXb Help "Specify 'Enable' if you wish to have Fast Cycle Write Data Hold." NamedItem Cmos 43h ChipReg 8Fh Prompt "Write Data Hold control" Choice "Enable 8Fh - 0011XXXX" pos[0]=0011XXXXb Choice "Disable 8Fh - 0010XXXX" pos[0]=0010XXXXb Help "Specify 'Enable' if you wish to have control over the Write Data Hold." NamedItem Cmos 49h ChipReg BAh CTMemSize Prompt "Memory size" Choice "2048K (8-256) BAh - 101101XX" pos[0]=101101XXb Choice "1536K (6-256) BAh - 101100XX" pos[0]=101100XXb Choice "1024K (4-256) BAh - 101000XX" pos[0]=101000XXb Choice " 512K (2-256) BAh - 100000XX" pos[0]=100000XXb Choice " 640K (2-256/2-64K) BAh - 011000XX" pos[0]=011000XXb Choice "1664K (6-256/2-64k) BAh - 011101XX" pos[0]=011101XXb Choice "2048K (2-1MB) BAh - 110000XX" pos[0]=110000XXb Choice "4096K (4-1MB) BAh - 111000XX" pos[0]=111000XXb Choice "6144K (6-1MB) BAh - 111110XX" pos[0]=111110XXb Choice "3072K (4-256/2-1MB) BAh - 101110XX" pos[0]=101110XXb Choice "4736K (256/64/4-1M) BAh - 011111XX" pos[0]=011111XXb Choice "5120K (4-256/4-1MB) BAh - 101111XX" pos[0]=101111XXb Choice "8192K (8-1MB) BAh - 111111XX" pos[0]=111111XXb Help "Select the number and type of SIMMs on the board. For example, if you have 8 256K bit SIMMs plugged into the system board select 2048 (8-256). Note that C&T documentation often refers to the number of banks (each containing 2 SIMMS) rather than the total number of SIMMs plugged into the system board." NamedItem Cmos 49h ChipReg BAh Prompt "4-way interleave" Choice "Enable BAh - XXXXXX1X" pos[0]=XXXXXX1Xb Choice "Disable BAh - XXXXXX0X" pos[0]=XXXXXX0Xb Help "All banks must have the same type of DRAMS for the 4-way interleave to be enabled. The DRAMS types cannot be mixed when 4-way interleave is enabled." NamedItem Cmos 4Ah ChipReg BBh Prompt "Use 640k-1Mb RAM as 1Mb-1.384Mb RAM" Choice "Enable BBh - X1XXXXXX" pos[0]=X1XXXXXXb Choice "Disable BBh - X0XXXXXX" pos[0]=X0XXXXXXb Help "This can only be enabled when exactly 1024Kb of system memory is available. When enabled, the 384Kb above 640Kb will be remapped to extended memory." NamedItem Cmos 4Ah ChipReg BBh Prompt "Page mode" Choice "Disable BBh - 0XXXXXXX" pos[0]=0XXXXXXXb Choice "Enable BBh - 1XXXXXXX" pos[0]=1XXXXXXXb Help "Select 'Enable' if you wish to have page mode." NamedItem Cmos 4Ah ChipReg BBh Prompt "ROM access wait states" Choice "4 BBh - XXXXXX11" pos[0]=XXXXXX11b Choice "3 BBh - XXXXXX10" pos[0]=XXXXXX10b Choice "2 BBh - XXXXXX01" pos[0]=XXXXXX01b Choice "1 BBh - XXXXXX00" pos[0]=XXXXXX00b Help "Specify the number of ROM access wait states." NamedItem Cmos 4Ah ChipReg BBh Prompt "RAM access wait states" Choice "1 BBh - XX1XXXXX" pos[0]=XX1XXXXXb Choice "0 BBh - XX0XXXXX" pos[0]=XX0XXXXXb Help "Specify the number of RAM access wait states." NamedItem Cmos 4Ah ChipReg BBh Prompt "EMS memory" Choice "Disable BBh - XXX0XXXX" pos[0]=XXX0XXXXb Choice "Enable BBh - XXX1XXXX" pos[0]=XXX1XXXXb Help "Specify 'Enable' if you wish to use extended/expanded memory." NamedItem Cmos 4Ah ChipReg BBh Prompt "EMS memory access wait states" Choice "2 BBh - XXXX10XX" pos[0]=XXXX10XXb Choice "1 BBh - XXXX01XX" pos[0]=XXXX01XXb Choice "0 BBh - XXXX00XX" pos[0]=XXXX00XXb Help "Specify the number of EMS memory access wait states." NamedItem Cmos 45h ChipReg B6h Prompt "RAM at 00000h-1FFFFh is on" Choice "System Board B6h - XXXX1000" pos[0]=XXXX1000b Choice "I/O Channel B6h - XXXX0000" pos[0]=XXXX0000b Help "Specify where the RAM at 00000h-1FFFFh is located." NamedItem Cmos 45h ChipReg B6h Prompt "RAM at 20000h-3FFFFh is on" Choice "System Board B6h - XXX1X000" pos[0]=XXX1X000b Choice "I/O Channel B6h - XXX0X000" pos[0]=XXX0X000b Help "Specify where the RAM at 20000h-3FFFFh is located." NamedItem Cmos 45h ChipReg B6h Prompt "RAM at 40000h-5FFFFh is on" Choice "System Board B6h - XX1XX000" pos[0]=XX1XX000b Choice "I/O Channel B6h - XX0XX000" pos[0]=XX0XX000b Help "Specify where the RAM at 40000h-5FFFFh is located." NamedItem Cmos 45h ChipReg B6h Prompt "RAM at 60000h-7FFFFh is on" Choice "System Board B6h - X1XXX000" pos[0]=X1XXX000b Choice "I/O Channel B6h - X0XXX000" pos[0]=X0XXX000b Help "Specify where the RAM at 60000h-7FFFFh is located." NamedItem Cmos 45h ChipReg B6h Prompt "RAM at 80000h-9FFFFh is on" Choice "System Board B6h - 1XXXX000" pos[0]=1XXXX000b Choice "I/O Channel B6h - 0XXXX000" pos[0]=0XXXX000b Help "Specify where the RAM at 80000h-9FFFFh is located." NamedItem Cmos 4Bh ChipReg BCh Prompt "MRDY during MASTER/CPU/DMA cycles" Choice "Enable BCh - XXXXX100" pos[0]=XXXXX100b Choice "Disable BCh - XXXXX000" pos[0]=XXXXX000b Help "Select 'Enable' if you wish to have MRDY during local RAM cycles." NamedItem Cmos 4Bh ChipReg BCh Prompt "MRDY during refresh" Choice "Enable BCh - X1XXXX00" pos[0]=X1XXXX00b Choice "Disable BCh - X0XXXX00" pos[0]=X0XXXX00b Help "Select 'Enable' if you wish to have MRDY generated during refresh." NamedItem Cmos 4Bh ChipReg BCh Prompt "RAS hold time in DMA/MASTER cycles" Choice "2 clk2 BCh - XX00XX00" pos[0]=XX00XX00b Choice "2.5 clk2 BCh - XX01XX00" pos[0]=XX01XX00b Choice "3 clk2 BCh - XX10XX00" pos[0]=XX10XX00b Choice "3.5 clk2 BCh - XX11XX00" pos[0]=XX11XX00b Help "Specify the number of clock cycles for RAS hold time." NamedItem Cmos 4Bh ChipReg BCh Prompt "Internal delay line usage" Choice "Enable BCh - XXXX1X00" pos[0]=XXXX1X00b Choice "Disable BCh - XXXX0X00" pos[0]=XXXX0X00b Help "Select 'Enable' if you wish to have internal delay line. Select 'Disable' if you wish to have external delay line." NamedItem Cmos 4Bh ChipReg BCh Prompt "Column address to CAS delay" Choice ".5 clk2 BCh - 0XXXXX00" pos[0]=0XXXXX00b Choice "1 clk2 BCh - 1XXXXX00" pos[0]=1XXXXX00b Help "Specify the clock delay to CAS for internal delay line." NamedItem Cmos 4Ch ChipReg BDh Prompt "EMS page register I/O base address" Choice "208h BDh - XXXX0000" pos[0]=XXXX0000b io 208h-209h Choice "218h BDh - XXXX0001" pos[0]=XXXX0001b io 218h-219h Choice "258h BDh - XXXX0101" pos[0]=XXXX0101b io 258h-259h Choice "268h BDh - XXXX0110" pos[0]=XXXX0110b io 268h-269h Choice "2A8h BDh - XXXX1010" pos[0]=XXXX1010b io 2A8h-2A9h Choice "2B8h BDh - XXXX1011" pos[0]=XXXX1011b io 2B8h-2B9h Choice "2E8h BDh - XXXX1110" pos[0]=XXXX1110b io 2E8h-2E9h Help "Specify the I/O base address for the EMS page register." NamedItem Cmos 4Ch ChipReg BDh Prompt "EMS Base Address" Choice "C0000h-CC000h BDh - 0000XXXX" pos[0]=0000XXXXb mem 0C0000h-0CC000h Choice "C4000h-D0000h BDh - 0001XXXX" pos[0]=0001XXXXb mem 0C4000h-0D0000h Choice "C8000h-D4000h BDh - 0010XXXX" pos[0]=0010XXXXb mem 0C8000h-0D4000h Choice "CC000h-D8000h BDh - 0011XXXX" pos[0]=0011XXXXb mem 0CC000h-0D8000h Choice "D0000h-DC000h BDh - 0100XXXX" pos[0]=0100XXXXb mem 0D0000h-0DC000h Choice "D4000h-E0000h BDh - 0101XXXX" pos[0]=0101XXXXb mem 0D4000h-0E0000h Choice "D8000h-E4000h BDh - 0110XXXX" pos[0]=0110XXXXb mem 0D8000h-0E4000h Choice "DC000h-E8000h BDh - 0111XXXX" pos[0]=0111XXXXb mem 0DC000h-0E8000h Choice "E0000h-EC000h BDh - 1000XXXX" pos[0]=1000XXXXb mem 0E0000h-0EC000h Help "Specify the EMS base address." NamedItem Cmos 4Eh ChipReg BFh Prompt "Page mode RAS time-out counter" Choice "Disabled BFh - XXXX1000" pos[0]=XXXX1000b Choice "Enabled BFh - XXXX0000" pos[0]=XXXX0000b Help "Specify 'Enabled' if you wish to have a page mode RAS time-out counter." NamedItem ; note: if the CMOS location for this item is changed, a corresponding ; change must be made for the #define CT_EMS in SAVEDATA.C Cmos 4Eh ChipReg BFh Prompt "External EMS" Choice "Disabled BFh - XXX0X000" pos[0]=XXX0X000b Choice "Enabled BFh - XXX1X000" pos[0]=XXX1X000b Help "Specify 'Enabled' if you have external EMS." NamedItem ; NOTES: 1) the 1-1.5 Mb choice has been deleted due to a chipset ; bug such that EMS size < 1 Mb cannot be configured; ; 2) if the CMOS location for this item is changed, a corresponding ; change must be made for the #define CT_EMS in SAVEDATA.C Cmos 4Eh ChipReg BFh Prompt "EMS memory size" ; Choice "1 Mb to 1.5 Mb BFh - 000XX000" pos[0]=000XX000b Choice "1 Mb to 2 Mb BFh - 001XX000" pos[0]=001XX000b Choice "1 Mb to 3 Mb BFh - 010XX000" pos[0]=010XX000b Choice "1 Mb to 4 Mb BFh - 011XX000" pos[0]=011XX000b Choice "1 Mb to 5 Mb BFh - 100XX000" pos[0]=100XX000b Choice "1 Mb to 6 Mb BFh - 101XX000" pos[0]=101XX000b Choice "1 Mb to 7 Mb BFh - 110XX000" pos[0]=110XX000b Choice "1 Mb to 8 Mb BFh - 111XX000" pos[0]=111XX000b Help "Specify the EMS memory size." NamedItem Cmos 56h ChipReg B0h Prompt "On chip I/O register" Choice "Disabled B0h - X0XXXXXX" pos[0]=X0XXXXXXb Choice "Enabled B0h - X1XXXXXX" pos[0]=X1XXXXXXb Help "Specify whether to enable or disable the on chip I/O register." NamedItem Cmos 56h ChipReg B0h Prompt "I/O base address for EMS mapper" Choice "Disabled B0h - 0XXXXXXX" pos[0]=0XXXXXXXb Choice "208h B0h - 1XXX0000" pos[0]=1XXX0000b io 208h-209h Choice "218h B0h - 1XXX0001" pos[0]=1XXX0001b io 218h-219h Choice "258h B0h - 1XXX0101" pos[0]=1XXX0101b io 258h-259h Choice "268h B0h - 1XXX0110" pos[0]=1XXX0110b io 268h-269h Choice "2A8h B0h - 1XXX1010" pos[0]=1XXX1010b io 2A8h-2A9h Choice "2B8h B0h - 1XXX1011" pos[0]=1XXX1011b io 2B8h-2B9h Choice "2E8h B0h - 1XXX1110" pos[0]=1XXX1110b io 2E8h-2E9h Help "Specify the I/O base address for the EMS mapper."